Thermal Management and Control in Testing Packaged Integrated Circuit (IC) Devices

1999-01-2723

08/02/1999

Event
34th Intersociety Energy Conversion Engineering Conference
Authors Abstract
Content
This paper describes the thermal management and design challenges of testing packaged integrated circuit (IC) devices, specifically device thermal conditioning and device-under-test (DUT) temperature control. The approach taken is to discuss the individual thermal design issues as defined by the device type (e.g. memory, microcontroller) and tester capabilities. The influence of performance-parameter specifications, such as the DUT parallelism, test time, index time, test-temperature range and test-temperature tolerance are examined. An understanding of these performance requirements and design constraints enables consideration of existing test handler thermal processing systems (e.g., gravity feed, pick and place), future test handler thermal concepts, and future high-parallelism testing needs for high-wattage memory and microprocessor devices. New thermal designs in several of these areas are described.
Meta TagsDetails
DOI
https://doi.org/10.4271/1999-01-2723
Pages
11
Citation
Pfahnl, A., Lienhard, J., and Slocum, A., "Thermal Management and Control in Testing Packaged Integrated Circuit (IC) Devices," SAE Technical Paper 1999-01-2723, 1999, https://doi.org/10.4271/1999-01-2723.
Additional Details
Publisher
Published
Aug 2, 1999
Product Code
1999-01-2723
Content Type
Technical Paper
Language
English