Surrogate modeling for faster assessment of thermal performance and reliability of discrete packaging in power electronics

2026-28-0100

To be published on 02/01/2026

Authors
Abstract
Content
The thermal performance and reliability of discrete packaging in power electronics are critical due to miniaturization and high-density packaging. Optimizing solder joint design is essential to mitigate thermo-mechanical fatigue, a primary failure mechanism caused by repeated thermal cycling in power switching applications like MOSFET packages. This cycling leads to uneven expansion and contraction among materials, potentially resulting in cracks that impair heat dissipation or cause delamination. While physics-based finite element modeling (FEM) is effective for predicting solder joint lifetimes, it can be resource-intensive and slow during the conceptual design phase, where rapid decision-making is crucial. This paper introduces a surrogate modeling approach to deliver faster, data-driven solutions in early design stages. By employing a finite element-based virtual design of experiments (VDoE), the study analyzes multiple design parameters, such as thermal interface material (TIM) thickness, chip area, mold material properties, and PCB layout, to assess their impact on fatigue cycles. Sensitivity analysis correlates critical parameters with performance responses, while surrogate models are developed using response surface methods and regression techniques. This methodology is applied to reliability studies of solder joints in discrete packaging for a DCDC converter on a rectifier PCB. The results provide insights into thermal resistance and damage parameters, aiding designers in selecting optimal packages and layouts for enhanced thermal performance. Furthermore, this approach will evolve into a compact digital twin to monitor package health during operation. Future work aims to incorporate additional parameters, such as thermal cycling time, to further understand thermal reliability under various loading scenarios. The data generated could also be integrated into an AI framework with machine learning algorithms to predict the performance of similar discrete packages in power electronics.
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Citation
Naga Satyakrishna, Vinjamuri, Pawan Rao Baikadi, and Przemyslaw Gromala, "Surrogate modeling for faster assessment of thermal performance and reliability of discrete packaging in power electronics," SAE Technical Paper 2026-28-0100, 2026-, .
Additional Details
Publisher
Published
To be published on Feb 1, 2026
Product Code
2026-28-0100
Content Type
Technical Paper
Language
English