J1850 Compatible Node Development

Given the fact that multiplex bus architectures are gaining acceptance, the need arises for hardware capable of implementing the desired structure Off-the-shelf technology exists that can be utilized for the design and development of J1850 compatible nodes A systems engineering approach to the design of a J1850 compatible node is taken A genenc model of a network node is defined and the design of a simple node is described The results of a market survey of available hardware and design tools are presented. This information is then used to develop several design approaches which are described and evaluated.