Design of an Alternative Hardware Abstraction Layer for Embedded Systems with Time-Controlled Hardware Access

2024-01-2989

07/02/2024

Event
2024 Stuttgart International Symposium
Authors Abstract
Content
This paper proposes a novel approach to the design of a Hardware Abstraction Layer (HAL) specifically tailored to embedded systems, placing a significant emphasis on time-controlled hardware access. The general concept and utilization of a HAL in industrial projects are widespread, serving as a well-established method in embedded systems development. HALs enhance application software portability, simplify underlying hardware usage by abstracting its inherent complexity and reduce overall development costs through software reusability. Beyond these established advantages, this paper introduces a conceptual framework that addresses critical challenges related to debugging and mitigates input-related problems often encountered in embedded systems. This becomes particularly pertinent in the automotive context, where the intricate operational environment of embedded systems demands robust solutions. The HAL design presented in this paper mitigates these issues. The design is structured as a modular software concept, leveraging the strategic use of configuration tables to provide an abstracted, rapid and well-organized method for configuring hardware. Furthermore, those configuration tables are used to realize an application-specific time-controlled synchronization mechanism between the actual hardware data registers and an internal software representation of those. The application software exclusively interacts with this representation, preventing errors arising from unstable inputs and ensuring strict timing. This paper provides a detailed description of the design, with a focus on its modular structure for an efficient and memory-saving implementation. Moreover, the document explores and discusses potential extensions and adaptations to the proposed design, enhancing its flexibility for individual use cases. In conclusion, this comprehensive exploration seeks to contribute to the advancement of embedded systems development by offering a refined and adaptable HAL design.
Meta TagsDetails
DOI
https://doi.org/10.4271/2024-01-2989
Pages
9
Citation
Simmann, G., Veeranna, V., and Kriesten, R., "Design of an Alternative Hardware Abstraction Layer for Embedded Systems with Time-Controlled Hardware Access," SAE Technical Paper 2024-01-2989, 2024, https://doi.org/10.4271/2024-01-2989.
Additional Details
Publisher
Published
Jul 02
Product Code
2024-01-2989
Content Type
Technical Paper
Language
English