The transition toward Software-Defined Vehicles (SDVs) [1] is driving a fundamental shift in automotive electrical and electronic architectures [1], where centralized high-performance computing platforms must support mixed-critical workloads under strict requirements for determinism, performance isolation [2], and functional safety. Consolidating safety-critical and non-critical applications onto shared System-on-Chip (SoC) platforms [3] introduces significant challenges in ensuring predictable execution behavior, bounded latency, and compliance with safety standards [4, 15]. Addressing these challenges is essential for enabling scalable and reliable next-generation automotive systems [1] [5]. This paper presents a hardware–software co-design approach to achieve deterministic and safety-certified operation in SDV [1] architectures. Unlike traditional implementations that rely on software hypervisors or hardware isolation independently, the novel core contribution of this work is an integrated, dual-layer hardware-software orchestration model. It dynamically coordinates static Stage-2 translation with hardware Extended Resource Domain Controllers (XRDC) and Memory Partitioning and Monitoring (MPAM) to enforce end-to-end spatial, temporal, and interconnect-level bus isolation.
The proposed solution combines hardware-assisted resource isolation mechanisms, including Hardware-enforced resource isolation and Memory Partitioning and Monitoring (MPAM) [6], with a lightweight partitioning hypervisor and Virtual Machine Monitor (VMM). XRDC [7] provides fine-grained access control for memory and peripheral resources, while MPAM [6] enables memory bandwidth allocation and monitoring to minimize resource contention across competing workloads. On the software side, the partitioning hypervisor [8] enforces strong temporal and spatial isolation between Virtual Electronic Control Units (vECUs), allowing mixed critical applications to coexist safely on a shared platform. VMM supports efficient virtualization [9, 10] and lifecycle management of virtual machines while maintaining deterministic execution characteristics.
The proposed architecture aligns with the requirements of ISO 26262 [4], enabling the certification of safety critical applications alongside non-critical services. By integrating hardware-enforced isolation with software-level partitioning, the approach ensures predictable system behavior and reduces interference between workloads. The results demonstrate that a coordinated hardware–software strategy is essential to bridge the gap between high-performance computing and functional safety, thereby enabling scalable, deterministic, and safety-compliant SDV [1] platforms for future automotive applications. System-level validation conducted on an NXP S32G3 [7] [10] vehicle network processor platform demonstrates the efficacy of the proposed co-design. Under artificial memory-bus contention generated by background non-critical (QM) Linux traffic, the hardware-enforced MPAM bandwidth regulation reduced maximum worst-case execution time (WCET) jitter for an ASIL real-time control loop from 142.6 μs down to 8.4 μs—achieving a 94.1% reduction in latency variation. Paravirtualized hypercall operations achieved a 40.2% latency reduction compared to standard Trap-and-Emulate approaches.