A High Performance Dual Mode Synchronous/Asynchronous Parallel Bus Controller Utilizing the PI Bus Standard Protocol

872492

10/1/1987

Authors
Abstract
Content
Boeing's Self-Timed Parallel Interface (SPI) Controller implements the synchronous PI bus backplane as well as an asynchronous self-timed backplane. The asynchronous mode implements the PI bus protocol while utilizing a self-timed transfer scheme. This scheme eliminates the complex clocking scheme of the synchronous backplane, supports decentralized systems, is technology independent, and supports very high data transfer rates. The technology independence of the SPI bus controller means that the transfer rate on the backplane is as fast as the technology will allow for the active modules on the backplane.
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DOI
https://doi.org/10.4271/872492
Pages
6
Citation
Foster, M., "A High Performance Dual Mode Synchronous/Asynchronous Parallel Bus Controller Utilizing the PI Bus Standard Protocol," SAE Technical Paper 872492, 1987, https://doi.org/10.4271/872492.
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Publisher
Published
10/1/1987
Product Code
872492
Content Type
Technical Paper
Language
English