This content is not included in your SAE MOBILUS subscription, or you are not logged in.
A PC and FPGA Hybrid Approach to Hardware-in-the-Loop Simulation
ISSN: 0148-7191, e-ISSN: 2688-3627
Published March 08, 2004 by SAE International in United States
This content contains downloadable datasetsAnnotation ability available
ECU designers are seeking more flexibility from HIL test systems. Often their needs are met by the development of custom hardware, either internally or by HIL test system vendors. Many systems also rely heavily on the use of multiple expensive microprocessors to achieve the required timing and synchronization performance. This paper discusses an alternative based on PC technology and reconfigurable I/O hardware. The HIL test system designer uses a graphical programming interface to reconfigure not only the real-time software portion of the system, but also the FPGA-based I/O hardware. This increases flexibility and lowers cost by providing capabilities such as generating simulated outputs synchronized to crank angle and implementing multiple serial communication protocols.
CitationViele, M., Stein, L., Gillespie, M., and Hoekstra, G., "A PC and FPGA Hybrid Approach to Hardware-in-the-Loop Simulation," SAE Technical Paper 2004-01-0904, 2004, https://doi.org/10.4271/2004-01-0904.
Data Sets - Support Documents
|Unnamed Dataset 1|
- Kulkarni Rahul Hoekstra Geoff LabVIEW FPGA in Hardware-in-the-Loop Simulation Applications National Instruments Corporation White Paper 2002
- Lamberg Klaus Richert Jobst Rasche Rainer A New Environment for Integrated Development and Management of ECU Tests SAE Paper 2003-01-1024
- Boulat A. Genninasca Y. Charlet A. Higelin P. ECUTEST - A Real-time Engine Simulator for ECU Development and Testing SAE Paper 2001-01-1911
- Castiglione Matthew S. Stecklein Gary Senseney Robert Stark David Development of Transmission Hardware-in-the-Loop Test System SAE Paper 2003-01-1027
- Jin Wensi Baracos Paul A Scalable Hardware-in-the-Loop System for Virtual Engine and Virtual Vehicle Applications SAE Paper 2003-01-1367
- Gehring Jürgen Schütte Herbert A Hardware-in-the-Loop Test Bench for the Validation of Complex ECU Networks SAE Paper 2002-01-0801
- Parnell Karen M. Reconfigurable Vehicle SAE Paper 2002-01-0144