Using FPGAs for Automated Design Validation

In the design process, after the first prototype returns from fabrication, engineers often use traditional test equipment to make low-level measurements such as digital rise times, voltage thresholds, and leakage currents, and analog harmonic and spurious distortion, noise, and more. Once these parameters are verified to be within specification, higher-level attributes such as protocol compliance on digital devices and modulation parameters on communications devices are then checked. This gives the engineer a good understanding of how the device behaves, and whether or not that behavior allows the device to properly interact with the world around it. However, how can you guarantee that the device will continue to operate over time, with the myriad of permutations of device state, data content, and in the presence of non-ideal, real-world conditions? Who has the time to run all those tests?