STRS SpaceWire FPGA Module
TBMG-10843
09/01/2011
- Content
An FPGA module leverages the previous work from Goddard Space Flight Center (GSFC) relating to NASA’s Space Telecommunications Radio System (STRS) project. The STRS SpaceWire FPGA Module is written in the Verilog Register Transfer Level (RTL) language, and it encapsulates an unmodified GSFCcore (which is written in VHDL). The module has the necessary inputs/outputs (I/Os) and parameters to integrate seamlessly with the SPARC I/O FPGA Interface module (also developed for the STRS operating environment, OE).
- Citation
- "STRS SpaceWire FPGA Module," Mobility Engineering, September 1, 2011.