Program for Design Analysis of Cache Memory

TBMG-32227

03/01/1998

Abstract
Content

CACHESIM is a C-language computer program that simulates (1) cache-memory options associated with a computer hardware design concept and (2) related properties that can be expected to affect the overall performance of the computer, before the computer is constructed. Heretofore, the performance effects of cache-memory options were investigated through hardware monitoring. CACHESIM provides for selection of options that include hardware organization, cache size, line size, replacement policy, write-hit policy, write-miss policy, fetch policy, simulated processor speed, processor instruction-execution clock cycles, and cache-miss clock-cycle penalty. For a given combination of options, the output of CACHESIM includes appropriate hit and miss rates, central-processing-unit time, and the number of memory stall cycles incurred. This information is useful in determining the overall effectiveness and performance of the cache design.

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Citation
"Program for Design Analysis of Cache Memory," Mobility Engineering, March 1, 1998.
Additional Details
Publisher
Published
Mar 1, 1998
Product Code
TBMG-32227
Content Type
Magazine Article
Language
English