Parallel Integrated Frame Synchronizer Chip

The Parallel Integrated Frame Synchronizer (PIFS) chip is one of three very-large-scale integrated (VLSI) circuits designed for ground processing of streams of telemetric data received from spacecraft. These application-specific integrated circuits (ASICs) are the main components of a developmental advanced telemetric-data-processing system that is intended to be smaller, cheaper, and more capable than its predecessors. Each of these ASICs is intended to perform most of the functions heretofore performed by multiple integrated circuits on printed-circuit cards. These ASICs are designed mainly to accommodate the packet-telemetry-data protocols recommended by the Consultative Committee for Space Data Systems (CCSDS); however, they also have generic capabilities in that they are programmable and can therefore also be made to handle telemetry in special data formats.