Multiple Embedded Processors for Fault-Tolerant Computing
TBMG-235
12/01/2005
- Content
A fault-tolerant computer architecture has been conceived in an effort to reduce vulnerability to single-event upsets (spurious bit flips caused by impingement of energetic ionizing particles or photons). As in some prior fault-tolerant architectures, the redundancy needed for fault tolerance is obtained by use of multiple processors in one computer. Unlike prior architectures, the multiple processors are embedded in a single field-programmable gate array (FPGA). What makes this new approach practical is the recent commercial availability of FPGAs that are capable of having multiple embedded processors.
- Citation
- "Multiple Embedded Processors for Fault-Tolerant Computing," Mobility Engineering, December 1, 2005.