Multifunctional Logic Gate Controlled by Temperature

The figure is a schematic diagram of a complementary metal oxide/semiconductor (CMOS) electronic circuit that has been designed to function as a NAND gate at a temperature between 0 and 80 °C and as a NOR gate at temperatures from 120 to 200 °C. In the intermediate temperature range of 80 to 120 °C, this circuit is expected to perform a function intermediate between NAND and NOR with degraded noise margin. The process of designing the circuit and the planned fabrication and testing of the circuit are parts of demonstration of polymorphic electronics — a technological discipline that emphasizes designing the same circuit to perform different analog and/or digital functions under different conditions. In this case, the different conditions are different temperatures.