Mathematical Modeling of a Copper-Deposition System for Integrated Circuits

Advanced packaging techniques are the key to utilizing state-of-the-art microelectronic devices. The flip-chip method has become a cost-effective means of erasing many packaging and thermal issues that could spell disaster for high-density, high-power integrated circuits (ICs). Making flip-chip receptacles presents significant engineering challenges. To overcome those challenges, Replisaurus developed a unique process that required mathematical modeling to better understand and optimize the patented process.