Evaluation of Four Methods of Reconfiguring an FPGA

A study was performed to evaluate the relative merits of four methods of reconfiguring a field-programmable gate array (FPGA) in response to detection of a faulty configurable logic block (CLB). As used here, “reconfiguration” signifies replacing the faulty CLB by disconnecting it and connecting, in its stead, a previously unused CLB. This study was a major part of an effort to develop a circuit-reconfiguration system (CRS) that could utilize any of the four methods to implement fault tolerance in the FPGA.