Electronic Warfare

NEXT GENERATION FPGAS FOR ELECTRONIC WARFARE SYSTEMS

Designers of virtually all electronic warfare system applications exploit CPUs and FPGAs, each offering unique strengths and advantages for handling a wide range of tasks. This diversity arises from fundamental differences in the devices. FPGAs consist of hardware logic, registers, memories, adders, multipliers and interfaces connected together by the user to perform a specific function. CPUs consist of ALUs, instruction execution engines, cache memory, dedicated I/O and memory ports all connected in a fixed architecture, whose resources are driven by program execution.

Electronic warfare systems impose some of the toughest restrictions on latency within the landscape of military electronics. For example, systems to defeat RCIEDs (radio controlled improvised explosive devices) must identify a signal that could detonate the device, and then immediately disable that communication through countermeasures. Essential tasks in the chain from receiving the signal, analyzing it, deciding which countermeasure to deploy, and then transmitting the jamming signal at the correct frequency and bandwidth, all must conform to an extremely strict time schedule. Thus, orchestrating the necessary FPGA and CPU resources becomes a critical design effort.