Column-Loading Input Chip for Neural-Network Module

The column-loading input chip (CLIC) is a conceptual integrated-circuit chip that would serve as an interface between (1) any of various sources of image data and (2) a three-dimensional analog neural network (3DANN) of the type described in "Neural-Network Modules for High-Speed Image Processing" (NPO-19881), NASA Tech Briefs, Vol. 21, No. 10 (October 1997), page 26. The overall functions of the CLIC (see Figure 1) would be to load 8-bit digital image-intensity signals from a 64 × 64 array of pixels, convert these digital signals to an array of 64 × 64 analog voltages, and couple these voltages simultaneously to all of the corresponding 64 × 64 input terminals of the 3DANN. To prevent a data-input bottleneck, the CLIC is designed to perform these functions within a 3DANN-cycle time of 250 ns. The digital-to-analog conversion would be accomplished in only about 140 ns, leaving about 110 ns for processing by the 3DANN. The CLIC is also designed to satisfy requirements of compactness and low power consumption.