On-Chip Power-Combining for High-Power Schottky Diode- Based Frequency Multipliers

A 1.6-THz power-combined Schottky frequency tripler was designed to handle approximately 30 mW input power. The design of Schottky-based triplers at this frequency range is mainly constrained by the shrinkage of the waveguide dimensions with frequency and the minimum diode mesa sizes, which limits the maximum number of diodes that can be placed on the chip to no more than two. Hence, multiple-chip power-combined schemes become necessary to increase the power-handling capabilities of high-frequency multipliers. However, the traditional powercombining topologies that are used below 1 THz present some inconvenience beyond 1 THz. The use of Y-junctions or hybrid couplers to divide/combine the input/output power at these frequency bands increases unnecessarily the electrical path of the signal in the range of frequencies where waveguide losses are considerable. Also, guaranteeing a perfect alignment of the very small chips during assembly, in order to preserve the balanced nature of the multiplier, is practically impossible with the subsequent impact on the multiplier performance.