Asynchronous Architectures for Large-Integer Processors

New architectures have been developed for cryptographic hardware that offer high throughput, algorithm flexibility, radiation hardness, and low power. The asynchronous (clockless) architecture combines a dedicated large-integer processor (LIP), a field programmable gate array (FPGA), and a simple processor. The asynchronous LIP can perform public-key encryption using large keys at a fraction of the runtime energy consumption of synchronous (clocked) systems. The system is made of quasi-independent components that can be commercialized as stand-alone or in different configurations.