Active-Pixel-Sensor ICs With Photosites in Substrates

Focal-plane arrays of active-pixel sensors (photodetectors integrated with in-pixel readout transistors) would be designed and fabricated within the emerging technological discipline of silicon-on-insulator (SOI) complementary metal oxide/semiconductor (CMOS) integrated circuits (ICs), according to a proposal. SOI CMOS seems destined to supplant the more familiar bulk CMOS as the standard for fabrication of very-large-scale integrated (VLSI) circuits, during the next few years. Heretofore, it has been generally considered that functional APS circuits cannot be implemented in SOI CMOS because the layers of silicon for fabricating electronic devices on SOI wafers are so thin that optical absorbing volumes cannot be made large enough. In the proposed approach, photodetectors would be implemented within SOI silicon substrates in such a way as to obtain the desired functionality. Little or no departure from established SOI CMOS processing would be necessary. One disadvantage of SOI might be a tendency toward the floating-body effect, but it is possible to counteract this effect through appropriate design.