Performance Analysis of a Skyline Solver on a Distributed Memory Parallel Supercomputer

921084

06/01/1992

Event
International Conference On Vehicle Structural Mechanics & Cae
Authors Abstract
Content
The performance of a parallel skyline solver is characterized analytically based on the average bandwidth, interprocessor communication speed, and the arithmetic processing speed. The formulas developed constitute a good predictor of the actual performance when the solver runs communication bound. This is the most interesting case because operation in this mode occurs for the largest processor configurations, and determines the ultimate performance of the solver. The analysis clearly shows the limiting effects of small-bandwidth coefficient matrices, and the relationship of processing speed and interprocessor communication bandwidth to the global performance. It is also shown that the largest potential gainsfor next generation machines will come from the availability of faster inter processor communication, rather than from enhanced arithmetic capability.
Meta TagsDetails
DOI
https://doi.org/10.4271/921084
Pages
12
Citation
Castro-Leon, E., and Barton, M., "Performance Analysis of a Skyline Solver on a Distributed Memory Parallel Supercomputer," SAE Technical Paper 921084, 1992, https://doi.org/10.4271/921084.
Additional Details
Publisher
Published
Jun 1, 1992
Product Code
921084
Content Type
Technical Paper
Language
English