On the Definition of Resource Sharing Levels to Understand and Control the Impact of Contention in Multicore Processors
Technical Paper
2021-01-5055
ISSN: 0148-7191, e-ISSN: 2688-3627
Sector:
Event:
Automotive Technical Papers
Language:
English
Abstract
The trend toward the adoption of a multiprocessor system on a chip (MPSoC) in
critical real-time domains, like avionics or automotive, responds to the demand
for increased computing performance to support advanced software
functionalities. The other side of the coin is that MPSoCs challenge software
timing analysis. This is so as co-running applications affect each other’s
timing behavior on account of the interference incurred when accessing shared
hardware resources, with the latter steadily increasing in number and complexity
in every new generation of MPSoCs. For a solid and cost-contained
software-timing validation approach, we contend that a taxonomy has to be
developed to capture the different levels at which processors’ resources can be
shared. Those levels are to be related to the conventional run-time software
abstractions (e.g., task, thread, runnable) and the particular abstraction used
to carry out contention analysis. From the standpoint of contention analysis,
only the resources in those levels shared by the different run-time software
entities need to be mastered and addressed by timing analysis, whereas the
remaining resources can be safely disregarded.
We tailor this approach to two of NVIDIA’s embedded platforms, TX2 and AGX
Xavier, of particular relevance for the automotive domain. For the identified
shared resources, we also characterize the contention that tasks can suffer and
discuss the limitations and early approaches for modeling timing interference in
shared hardware resources.
Authors
- Hamid Tabani - Barcelona Supercomputing Center
- Leonidas Kosmidis - Barcelona Supercomputing Center
- Enrico Mezzetti - Barcelona Supercomputing Center and Maspatechnologies S.L.
- Jaume Abella - Barcelona Supercomputing Center and Maspatechnologies S.L.
- Francisco J. Cazorla - Barcelona Supercomputing Center: Centro Nacional de Supercom
Citation
Tabani, H., Kosmidis, L., Mezzetti, E., Abella, J. et al., "On the Definition of Resource Sharing Levels to Understand and Control the Impact of Contention in Multicore Processors," SAE Technical Paper 2021-01-5055, 2021, https://doi.org/10.4271/2021-01-5055.Data Sets - Support Documents
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