Autonomous driving systems and connected mobility are the next big developments for the car manufacturers and their suppliers during the next decade. To achieve the high computing power needs and fulfill new upcoming requirements due to functional safety and security, heterogeneous processor architectures with a mixture of different core architectures and hardware accelerators are necessary.
To tackle this new type of hardware complexity and nevertheless stay within monetary constraints, high performance computers, inspired by state of the art data center hardware, could be adapted in order to fulfill automotive quality requirements. The European Processor Initiative (EPI) research project tries to come along with that challenge for next generation semiconductors.
To be as close as possible to series development needs for the next upcoming car generations, we present a hybrid semiconductor system-on-chip architecture for automotive. This microprocessor is inspired and derived from HPC architecture of the European Processor Initiative research project.
Furthermore we suggest a possible future architecture for high performance automotive microprocessors integrated on an automotive computing platform. We describe our architectural hardware approach for a generic high performance Central Processing Unit (CPU) for deep embedded operation up to hosting POSIX based automotive systems. It implements different kinds of non-functional requirements for functional safety like fail-operational and for security crypto-accelerators within a single package.