Understanding how to Mitigate Failures Induced by Atmospheric Radiation with New Transistors Layouts for Processors

Authors

• Rafael Navarenho de Souza - University Center of FEI
• Leonardo Navarenho de Souza Fino - University Center of FEI

Topic

• Radiation
• Energy consumption
• Transistors

Citation

Also In

References

1. NASA Space Radiation Effects on Electronic Components in Low-Earth Orbit Practice No. PDED-1258 1 7 Apr. 1996
2. Bolinder R. Atmospheric Radiation Effects Study on Avionics - An Analysis of NFF Errors M.S thesis Linköpings universitet - Institutionen för datavetenskap Linköping 2013
3. SEEDER Consortium, SEEDER Design Guide First 2010
4. Microsemi Understanding the Impact of Single Event Effects in Avionics Applications Microsemi Corporation 2011
5. Hodson R. B. , and Ng T. Avionics for Exploration Technology Exchange Conference Nov. 2007
6. Barnaby H. Total-Ionizing-Dose effects in modern CMOS technologies IEEE Trans. Nucl. Sci. 53 6 3103 3120 2006
7. International Technology Roadmap for Semiconductors http://public.itrs.net/
8. Colinge J.P. , Gao M. H. , Romano-Rodriguez A. , Maes H. , and Claeys C. Silicon on insulator “gate all around” device in Proc. IEDM Tech. Dig. 595 1990
9. Faccio F. and Cervelli G. Radiation-Induced Edge Effects in Deep Submicron CMOS Transistors IEEE Trans. Nucl. Sci. 52 6 2413 2420 2005
10. Alexander D. R. Design issues for radiation tolerant microcircuits for space 1996 NSREC Conf. Indian Wells, CA Jul. 1996
11. Lacoe R. C. Improving integrated circuit performance through the application of hardness-by-design methodology IEEE Trans. Nucl. Sci. 55 4 1903 1925 Aug. 2008
12. Campbell M. , Anelli G. , Burns M. , Cantatore E. , Casagrande L. , Delmastro M. , Dinapoli R. , Faccio F. , Heijne E. , Jarron P. , Luptak M. , Marchioro A. , Martinengo P. , Minervini D. , Morel M. , Pernigotti E. , Ropotar I. , Snoeys W. , and Wyllie K. A pixel readout chip for 10-30 MRad in standard 0.25 μm CMOS IEEE Trans. Nucl. Sci. 46 3 156 160 Jun. 1999
13. Lacoe R. C. , Osborn J. V. , Koga R. , Brown S. , and Mayer D. C. Application of hardness-by-design methodology to radiation-tolerant ASIC technologies IEEE Trans. Nucl. Sci. 47 6 2334 2341 Dec. 2000
14. Lee M. S. and Lee H. C. Dummy Gate-Assisted n-MOSFET Layout for a Radiation-Tolerant Integrated IEEE Trans. Nucl. Sci. 60 4 3084 3091 Aug. 2013
15. Anelli G. , Campbell M. , Delmastro M. , Faccio F. , Florian S. , Giraldo A. , Hejine E. , Jarron P. , Kloukinas K. , Marchioro A. , Moreira P. , and Snoeys W. Radiation tolerant VLSI circuits in standard deep submicron CMOS technologies for the LHC experiments: Practical design aspects IEEE Trans. Nucl. Sci. 46 6 1690 1696 Dec. 1999
16. Giraldo A. , Paccagnella A. , and Minzoni A. Aspect ratio calculation in n-channel MOSFET's with a gate-enclosed layout Solid State Electron. 44 981 989 Jun. 2000
17. Faccio F. Design hardening methodologies for ASICs Radiation Effects on Embedded Systems Velazco R. , Fouillat P. , and Reis R. New York Springer-Verlag 143 160 2007
18. Nowlin N. , Bailey K. , Turfler T. , and Alexander D. A total-dose hardening-by-design approach for high-speed mixed-signal CMOS integrated circuits Int. J. High-Speed Electron. Syst. 14 2 367 378 2004
19. Gimenez S. P. The Wave SOI MOSFET: A New Accuracy Transistor Layout to Improve Drain Current and Reduce Die Area for Current Drivers Applications 215th ECS Meeting, ECS Trans. 19 153 158 San Francisco 2009
20. da Silva A. L. Electrical Behavior Study of the Wave SOI nMosfet and Conventional Counterpart M.S thesis Center University of FEI São Bernardo do Campo 2010
21. de Souza R. Navarenho Experimental Comparative Study Between the Wave Layout Style and its Conventional Counterpart for Implementation of Analog and Digital Integrated Circuits M.S thesis Center University of FEI São Bernardo do Campo 2012
22. de Souza R. Navarenho , and Gimenez S. P. Experimental Comparative Study Between the Wave Layout Style and its Conventional Counterpart for Implementation of Analog Integrated Circuits ECS Trans. 49 519 526 2012
23. de Souza R. Navarenho , Gimenez S. P. , and Silveira M.A.G. Experimental Comparative Study of the Threshold Voltage (V TH ) between Wave nMOSFET and its Conventional Counterpart after X-ray Ionizing Irradiation SEMINATEC Campinas May 2013
24. de Souza R. Navarenho , Gimenez S. P. , and Silveira M.A.G. Total Ionizing Dose Radiation Effects between the Wave Layout Style and its Conventional Counterpart focusing on the Digital IC Applications RADECS - Radiation Effects on Components and Systems Oxford Sep. 2013
25. de Souza R. Navarenho , Gimenez S. P. , and Silveira M.A.G. Mitigation of the Total Ionizing Dose Radiation Effects using the Wave Layout Style for Digital IC Applications SEMINATEC São Paulo Apr. 2014
26. Adell P. C. , Scheick L. Z. Radiation Effects in Power Systems: A Review IEEE Trans. Nucl. Scienc. 60 3 1929 1952 Jun. 2013
27. Simoen E. , Gaillardin M. , Paillet P. , Reed R. A. , Schrimpf R. D. , Alles M. L. , El-Mamouni F. , Fleetwood D.M. , Griffoni A. , Claeys C. Radiation Effects in Advanced Multiple Gate and Silicon-on-Insulator Transistors IEEE Trans. Nucl. Sci. 60 3 1970 1991 Jun. 2013
28. The MOSIS Service http://www.mosis.com 2010

Cited By