Automotive Gateway Design Using Evolutionary Algorithms

Because of the rapidly increasing amount of electronic components and busses in a vehicle, the use of gateways in Electronic Control Units (ECUs) becomes more important. The upcoming question is how to design an optimal gateway.

This paper describes a method for designing an optimal automotive gateway in an FPGA by using Evolutionary Algorithms (EAs). The complete gateway functionality is diagrammed in a specification graph which consists of a function graph and an architecture graph. The function graph describes the complete functionality of the gateway. The architecture graph shows the variety of the different implementation options of the mapped function graph. Each gateway task in the function graph can be realized either in a parallel way (different kinds of hardware implementations) or in a sequential way (software on a microprocessor core). Depending on the different realization methods, the tasks of the function graph are mapped on the individual implementation node of the architecture graph. The edges of the specification graph are weighted with the values which give input for the multi-objective optimization of the system. The optimization of the specification graph can only be solved in polynomial time with a nondeterministic algorithm (NP-hard problem). Therefore heuristics like EAs are used. The procedure provides a set of optimal implementations based on the multi-objective optimization which satisfy user defined constraints like for instance cost and performance. In this paper the method of designing a specification graph for an FPGA based automotive gateway is described. The assigned literature will be referred to for the optimization of the specification graph.