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An Approach to Verification of Interference Concerns for Multicore Systems (CAST-32A)

Rapita Systems, Inc., Ltd.-Steven H. VanderLeest, Christos Evripidou
  • Technical Paper
  • 2020-01-0016
Published 2020-03-10 by SAE International in United States
The avionics industry is moving towards the use of multicore systems to meet the demands of modern avionics applications. In multicore systems, interference can affect execution timing behavior, including worst case execution time (WCET), as identified in the FAA CAST-32A position paper. Examining and verifying the effects of interference is critical in the production of safety-critical avionics software for multicore architectures. Multicore processor hardware along with aerospace RTOS providers increasingly offers robust partitioning technologies to help developers mitigate the effects of interference. These technologies enable the partitioning of cores for different applications at different criticalities and make it possible to run multiple applications on one specific core. When incorporated into system-design considerations, these partitioning mechanisms can be used to reduce the effects of interference on software performance. In this paper we describe a novel approach to verifying the effectiveness of RTOS interference mitigation on the final hosted software. We showcase the use of the proposed approach on the NXP T2080 multicore board. The approach follows a V-model based methodology in which high- and low-level requirements…
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