THE AH-64D LONGBOW APACHE HOT BENCH
VFS-F50-2011
5/11/1994
- Content
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Traditional development testing of helicopter avionics systems at McDonnell Douglas Helicopter Systems has utilized a hot bench configuration composed of a complete interconnection of the aircraft’s avionics boxes or Line Replaceable Units (LRUs) which interface with the 1553B control/data mux bus and their respective input and output signals. A new version is being developed to test the advanced avionics suites and architectures of the AH-64C/D Longbow Apache helicopter. This paper is an update of one presented in October of 1990 to the American Helicopter Society in Phoenix, Arizona2 Since that time the Longbow hot bench has continually evolved into a system meeting the changing development needs of the Integrated Product Development Team. This hot bench was designed to provide manual or automatic operation for ease of operation and repeatability. Hardware and software design criteria are examined in this paper as they relate to human interfacing for information display and control. The Longbow Apache helicopter avionics suite is composed of several subsystem processors connected to three separate dual redundant 1553B mux buses. Each subsystem processor contains a dedicated 32 bit processor and software which is tested as a separate unit. The overall operation is monitored in the crewstations on Multi-Function Displays. Upon completion of individual tests, all LRUs are integrated onto the hot bench for system testing. Due to the complexity of this system, an advanced hot bench was proposed in the late 1980’s to facilitate and monitor the laboratory testing program. It was intended to monitor the mux bus traffic to determine system performance while displaying selected parameters in binary, hexadecimal, or engineering unit formats. As a result of obvious needs, a PC-based 1553 mux bus real-time monitor was designed to support development efforts and facilitate ground and flight testing programs. Examples of these operational displays are provided. In addition to monitoring mux bus traffic, a computer controlled I/O interface was designed to sequentially adjust subsystem signal levels (analog, discrete, serial) while monitoring manual switch settings (e.g. trigger signals). These test sequences are used to verify pass/fail criteria. The master computer system also records mux bus and subsystem output data for later data reduction. This design has resulted in a highly effective tool which provides engineers with a real-time presentation of system operation prior to LRU installation and testing on the aircraft.
- Citation
- Bauer, T., "THE AH-64D LONGBOW APACHE HOT BENCH," Forum 50 - Washington, D.C. 1994, Washington, D.C., May 11, 1994, https://doi.org/10.4050/VFS-F50-2011.