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A Single-chip RISC Microcontroller Boarding on MY1998
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English
Abstract
This paper presents a single-chip 32bit RISC microcontroller boarding on MY1998 dedicated to highly complicated powertrain management. The high performance 32bit RISC CPU provides the only solution to meet requirements of drastic CPU performance enhancement and integration.
Furthermore, a 32bit counter, based on a 20 MHz clock, and a 32bit multiplier make possible misfire detection and precise analysis of the engine management strategy, especially cylinder individual air-fuel ratio control.
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Citation
Watanabe, A., Tanaka, S., Kaneyasu, M., Asano, M. et al., "A Single-chip RISC Microcontroller Boarding on MY1998," SAE Technical Paper 970863, 1997, https://doi.org/10.4271/970863.Also In
References
- Hasegawa Y. et al. “Individual Cylinder Air-Fuel Ratio Feedback Control Using an Observer” SAE Paper No. 940376
- Ribbens W.B. Park J. “Road Tests of a Misfire Detection System” SAE Paper No. 940975
- Kaneyasu M. “Engine Knock Detection Using Multi-Spectrum Method” SAE Paper No. 920702