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CMOS Chip Design for Reduced Radiated EMI Emissions
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English
Abstract
With the supply & output current (ICC, IOL, IOH) rise times inherent in today's CMOS processes, EMI problems are present even though clock frequency & output voltage switching speed may be slow. The EMI problem is first explained, then basic theory is presented with explanation on how to use it for initial design or to fix a chip so that it has reduced radiated emissions. Actual circuit designs are given which modify the ICC, IOL, and IOH waveforms without destroying functionality or performance. Substrate noise is also reduced to benefit mixing of analog and digital functions on the chip.
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Authors
Citation
Miller, W., "CMOS Chip Design for Reduced Radiated EMI Emissions," SAE Technical Paper 920388, 1992, https://doi.org/10.4271/920388.Also In
References
- White, Donald R.J. Mardiguian, Michael A Handbook series on Electromagnetic Interface and Compatibility 3 9.3 9.21 8 10.8 10.19 Gainesville, Virginia Interference Control Technologies, Inc. 1988