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An Architecture for Electronic Throttle Control Systems
Technical Paper
2003-01-0098
ISSN: 0148-7191, e-ISSN: 2688-3627
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English
Abstract
This paper presents an architecture for monitoring and controlling an electronic throttle control system. The architecture contains two processors, the MAIN and the MCP. The MAIN is responsible for calculating the desired throttle position and the MCP for positioning the throttle using feedback control. The two processors measure all pedal and throttle sensors redundantly and continuously monitor the state-of-health of the other processor. Depending on the fault(s) detected, actuator default position, limited throttle authority, forced idle, Bowden cable mode or engine shutdown remedial action may be taken.
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Citation
Costin, M., Schaller, R., Maiorana, M., Purcell, J. et al., "An Architecture for Electronic Throttle Control Systems," SAE Technical Paper 2003-01-0098, 2003, https://doi.org/10.4271/2003-01-0098.Also In
SAE 2003 Transactions Journal of Passenger Cars - Electronic and Electrical Systems
Number: V112-7; Published: 2004-09-15
Number: V112-7; Published: 2004-09-15
References
- Strieb, H.-M. Bischof, H. “Electronic Throttle Control (ETC): A Cost Effective System for Improved Emissions, Fuel Economy, and Driveability” SAE Technical Paper 960338 1996
- McKay, D. Nichols, G. Schreurs, B. “Delphi Electronic Throttle Control Systems for Model Year 2000; Driver Features, Systems Security, and OEM Benefits. ETC for the Mass Market” SAE Technical Paper 2000-01-0556 2000